Burning discs in 2026

I got this idea to start burning discs again for archiving purposes because hard drive and SSD prices are really high at the moment while the price for BD-R and BD-R DL media is pretty low. This turned out to be quite the adventure with coasters (failed discs) and deep analysis until success in the end.

Blu-Ray writer in USB 3.0 enclosure

First I bought an LG BU40N ultra slim Blu-ray writer in an USB 3.0 enclosure via AliExpress, although the specific drive wasn’t mentioned in product description at the time of purchase the user reviews hinted it would be an LG BU40N or similar LG drive. My purpose with the drive is to burn discs, but most of the users posting reviews happily comment that the drive works for ripping Blu-ray movies with ‘makemkv’, at the time I didn’t think much of it assuming it would be fine for burning discs as well.

What I ended up receiving was a refurbished (but sold as “new”) LG BU40N drive manufactured in 2017 which ended up with roughly 50% coasters (failed burns) when writing Ritek BD-R DL media, and later 100% coasters when writing Verbatim BD-R DL imported straight from Japan (media descriptor; “VERBAT/IMf/0 , Mitsubishi Kagaku Media Co.”). Yes, good quality media actually fails completely in this drive. What did work from the beginning was burning BD-RE DL (rewritable) media which is written in a different way compared to BD-R DL (write once).

Verbatim BD-R DL 50pcs spindle

I tried different writing speeds and different burning software under Linux like ‘cdrskin’, ‘xorriso’, ‘growisofs’ and even ImgBurn (using Wine), also tried powering the drive using external power supply via USB hub and later natively using SATA connectors directly to rule out power related problems completely, but nothing improved the situation. The drive kept giving “SCSI error condition on command 53h RESERVE TRACK: [3 72 00] Medium error” when writing lead in track on BD-R DL media, sometimes also error during lead out the few times it reached that far. After thinking the problem could be firmware related, the LG BU40N drive came shipped with firmware “FR07”, perhaps a newer firmware would work better, so I flashed the “LibreDrive” firmware v1.03 for LG BU40N recommended by the ‘makemkv’ community, but that didn’t make any difference either, still error when writing BD-R DL discs.

When doing ‘lsusb’ command in Linux I noticed the USB 3.0 enclosure for the drive reported as “JMS583 PCIe/NVMe bridge” which is intended to be used as SATA translation for SSDs but the chipset in the enclosure on the board was JMS578 according to the chip label. Aha! Perhaps the factory in china flashed the wrong JMS firmware which doesn’t support a full set of SATA commands required for an optical drive which results in the SCSI error I was seeing. I went ahead and flashed “JMS578 SATA 6Gb/s” pure bridge firmware which support optical drives, it was difficult to flash since I had to put the JMS578 in recovery mode by grounding pin #2 on the flash chip for one second during power on, and also had to modify the golang flash source code I found on GitHub to support the Zetta flash used in the enclosure. After a several failed attempts I finally managed to flash the JMS578 with proper firmware but the SCSI error when writing discs remained unfortunately.

LG BU40N controller board

I disassembled the LG BU40N drive to see if there was some way to calibrate the Blu-ray laser head, but couldn’t find any small potentiometers which is how optical drives could be calibrated back in the day. While checking around on the drive controller board/PCB I noticed that the MediaTek MT1959 chipset was used, so the calibration is probably done at factory through programming somehow, that’s when I spotted solder points marked ‘UTXD’ and ‘URXD’ on silkscreen. Great, so there is an UART there for the MediaTek chip, curious I soldered 30AWG wires to the points and a FT232 to USB level shifter serial board.

FT232 board hooked up to MediaTek MT1959 UART port
Checking voltage levels of UART signal with oscilloscope

After verifying signal voltage levels using an oscilloscope and testing different serial settings in ‘minicom’ I settled for 115200 baud and “8N1” which seems correct, unfortunately it’s a proprietary binary log/protocol of sorts with a few ASCII strings confirming the baud rate was correct. I managed to find two recurring hex bytes which seemed to be some sort of “end of line” sequence, not sure. I wrote a short Python program to handle the input on the bash command line (one-liner with tabs and line feeds):

python3 -u -c "
import sys
buffer = ''
while True:
    byte_data = sys.stdin.buffer.read(1)
    if not byte_data: break
    byte_val = byte_data[0]
    hex_pair = f'{byte_val:02x}'
    buffer += hex_pair
    print(hex_pair, end=' ', flush=True)
    if buffer.endswith('aa1c'):
        print('', flush=True)
        buffer = ''
" < /dev/ttyUSB0 | ts '[%Y-%m-%d %H:%M:%.S]' | tee mediatek.log

The output then looked like this, a few sample lines:

[2026-07-06 00:34:06.154630] e3 33 7a aa 1c
[2026-07-06 00:34:06.250159] e4 19 69 2a b0 1b e5 19 72 9a 01 cb 1a e3 2d cc aa 1c
[2026-07-06 00:34:06.282073] e4 2d ce 2a 0c 1b e3 2d d1 aa 1c
[2026-07-06 00:34:06.454104] e7 2d c9 5a 04 00 fb 7f 18 e4 19 46 2a 0e 1b e3 34 c6 aa 1c

I couldn’t find much info about the binary UART protocol/log used by MediaTek, so pasted the logs from a failed burn and successful one into an GenAI prompt and it managed to identify what was going on, but can’t be completely sure if the AI hallucinated or not. The gist of the errors during the failed burn is that the Automatic Gain Control (AGC) and Focus Coil Lens Actuator Driver DAC failed to get reflection after several retries most likely due to fading laser diode. This is why I assume the drive is refurbished rather than “new old stock”. If someone ordered this for the sole purpose of ripping Blu-ray movies they would probably be happy with it, but not me who needs it mainly to burn discs.

While searching around on AliExpress I managed to find a cheap 9.5mm ultra slim Panasonic (Matshita) BD-MLT UJ272 drive which would fit in the USB 3.0 enclosure I have and is recommended for being good at writing while compatible with a lot of media. The drive was most likely cheap because you can’t rip Blu-ray movies using ‘makemkv’ with it which seems to be what a majority of the market wants these days. After a couple of weeks the Panasonic UJ272 arrived, I replaced the LG BU40N with it in the USB 3.0 enclosure and started testing, so far every disc I throw at it works perfect, not a single coaster since. Another benefit is that this Panasonic drive when used with ‘k3b’ (‘cdrskin’) doesn’t need to eject the drive before verify, it handles it without ejecting. For my archive purposes I now use Verbatim BD-R DL with media descriptor “VERBAT/IMf/0” (dual layer 50gb) and Ritek BD-R Pro with media descriptor “RITEK/BR3/0” (single layer 25gb). These disc types are currently the sweet spot regarding pricing, BD-R XL is still relatively expensive per gigabyte. For frequent temporary backups I use Verbatim BD-RE DL (dual layer 50gb).

Tang Nano 20k FPGA dev board

GOWIN FPGA Designer

I recently bought a Tang Nano 20k development board from Sipeed. The hardware worked out of the box but I had some software problems with the IDE initially. Programming using the built-in Gowin programmer has been working fine so far (which seems to be common problem). I’m using Xubuntu 24.04.4 LTS (which is basically a slimmed down Ubuntu 24.04.4 LTS running with Xorg and XFCE) on a PC.

After downloading ‘Gowin_V1.9.11.03_Education_Linux.tar.gz’ from gowinsemi.com (requires registering), I unpacked the files into ‘/opt/gowin’ (any directory you create is fine), and tried to run it, but got library version errors and core dumps. In order to fix the problem I created a script called ‘gowin_ide.sh’ to launch ‘gw_ide’:

#!/bin/bash
cd /opt/gowin/IDE/bin
export LD_LIBRARY_PATH=/opt/gowin/IDE/lib
./gw_ide

This will make sure the IDE uses its own libraries first (before system) and sub processes launched from the GUI also finds them. There was still a library error where it complains about undefined symbols in “libfontconfig”, this needed a separate fix:

rm /opt/gowin/IDE/lib/libfreetype.so.6

Now finally ‘gw_ide’ launches, and also the tools from within the GUI.

I then decided to try an example tutorial found here:
https://wiki.sipeed.com/hardware/en/tang/tang-nano-20k/example/led.html

This worked for the most part, just had to change the “IO Type” voltages to “LVCMOS33” in the FloorPlanner part, more info about in that comments of that article.

I modified the example LED blink design a bit, added another counter LED blink and a Verilog testbench (even though a testbench might be overkill in this case), mostly to figure out how to run a simulation with this toolchain because I didn’t feel like using DSim from Altair (requires registration) which is linked in the GUI.

Here is the modified ‘led.v’ example:

`timescale 1ns / 1ps
module led(
    input wire Clock,
    output wire LED1,
    output wire LED5
);
/********** Counters **********/
//parameter Clock_frequency = 27_000_000; // Crystal oscillator frequency is 27Mhz
`ifdef SIM_COUNT_OVERRIDE
    parameter LED1_value = `SIM_COUNT_OVERRIDE;
    parameter LED5_value = `SIM_COUNT_OVERRIDE;
`else
    parameter LED1_value = 13_499_999; // The number of times needed to time 0.5s
    parameter LED5_value = 1_349_999; // This currently acts like a slow clock for GAO at 0.05s
`endif
reg [23:0]  LED1_value_reg = 24'b0; // counter value
reg         LED1_value_flag = 1'b0; // IO change flag
always @(posedge Clock) begin
    if ( LED1_value_reg <= LED1_value ) begin // not count to 0.5s
        LED1_value_reg  <= LED1_value_reg + 1'b1; // Continue counting
        LED1_value_flag <= 1'b0; // No flip flag
    end
    else begin //Count to 0.5S
        LED1_value_reg  <= 24'b0; // Clear counter,prepare for next time counting.
        LED1_value_flag <= 1'b1 ; // Flip flag
    end
end
reg [23:0]  LED5_value_reg = 24'b0; // counter value for LED5
reg         LED5_value_flag = 1'b0; // IO change flag
always @(posedge Clock) begin
    if ( LED5_value_reg <= LED5_value ) begin //not count to 0.05s
        LED5_value_reg  <= LED5_value_reg + 1'b1; // Continue counting
        LED5_value_flag <= 1'b0; // No flip flag
    end
    else begin
        LED5_value_reg  <= 24'b0; // Clear counter,prepare for next time counting.
        LED5_value_flag <= 1'b1; // Flip flag
    end
end
/********** IO voltage flip **********/
reg LED1_reg = 1'b0; // Initial state
always @(posedge Clock) begin
    if ( LED1_value_flag ) begin //  Flip flag 
        LED1_reg <= ~LED1_reg; // IO voltage flip
        `ifdef SIMULATION
            $strobe("Time: %0t   LED1: %0d", $time, LED1_reg);
        `endif
    end
    else //  No flip flag
        LED1_reg <= LED1_reg; // IO voltage constant
end
assign LED1 = LED1_reg;
/********** IO voltage flip **********/
reg LED5_reg = 1'b0; // Initial state
always @(posedge Clock) begin
    if ( LED5_value_flag ) begin //  Flip flag 
        LED5_reg <= ~LED5_reg; // IO voltage flip
        `ifdef SIMULATION
            $strobe("Time: %0t  LED5: %0d", $time, LED5_reg);
        `endif
    end
    else //  No flip flag
        LED5_reg <= LED5_reg; // IO voltage constant
end
assign LED5 = LED5_reg;
endmodule

…and the testbench ‘tb_led.v’:

`timescale 1ns / 1ps
module tb_led;
    // Declare signals to connect to the LED module
    reg Clock = 0;
    wire LED1;
    wire LED5;
    // Instantiate your original LED module
    led uut (
        .Clock(Clock),
        .LED1(LED1),
        .LED5(LED5)
    );
    // Generate a 27MHz clock
    always #18.5185 Clock <= ~Clock;
    always @(LED1) begin
        $strobe("time: %0t | Testbench observed LED1 at: %b", $time, LED1);
    end
    always @(LED5) begin
        $strobe("time: %0t | Testbench observed LED5 at: %b", $time, LED5);
    end
    // Control the simulation timeline
    initial begin
        // Tell Verilator the name of the waveform file to create
        $dumpfile("waveform.fst");
        // Dump all signals inside the testbench and child modules (0 means everything)
        $dumpvars(0, tb_led);
        // Set a clean format for %0t reporting
        $timeformat(0, 4, "s", 20);
        // Let it run for 1.2 seconds
        #1200000000;
        $display("Simulation successfully completed!");
        $finish;
    end
endmodule

What I ended up using for simulation is Verilator which is open source can be installed like this in Ubuntu Linux:

sudo apt-get install verilator

I also installed GTKWave Analyzer to visually see trace dumps from Verilator:

sudo apt-get install gtkwave

To build the simulation for my custom testbench I use a terminal shell (command line) in the directory where the Verilog sources are:

verilator --binary --timing --trace-fst --top-module tb_led -DSIMULATION -Wall +1364-2001ext+v led.v tb_led.v

…and then to run the simulation:

obj_dir/Vtb_led

The trace can be found in current directory after simulation run, I load it like this to view:

gtkwave waveform.fst

After playing around with the Gowin Analyzer Oscilloscope (GAO) for a while which is a tool included in the GUI, it seems very powerful (reminds me of Xilinx ChipScope), more info in the user guide.

I hope this info helps to get started, let me know if you have any questions or want to share your own tips.

SNES capacitor replacement

Measuring SNES capacitors

I had intermittent problems powering on the Super Nintendo, it would just black screen screen sometimes, turns out the electrolytic capacitors were bad. The yellow wires and PIC chip as seen on board is my SuperCIC install giving NTSC 60Hz and PAL 50Hz switchable using reset button, that modification is not related to this repair. There were no visible leaks from the electrolytic capacitors but several of them measured bad using the ESR meter so it was high time to recap.

SNES PCB and capacitor kit

I ordered a Super Nintendo PAL Capacitor Kit from Retro Upgrades via eBay, they shipped fast and also included a new voltage regulator which was nice. There are some good capacitors on the board, but I replace all of them since those are likely to go bad soon as well.

Removing capacitor from SNES main board

I like to use the “push down and turn” method using pliers to remove SMD type capacitors, some prefer using SMD rework station to desolder with hot air. In my experience bad capacitors sometimes explode when using hot air which can damage traces and be dangerous due to metal shrapnel flying around, so that’s the main reason I prefer using pliers. Besides, leaky caps sometimes smells like raw fish, especially when heated up (and exploding), so not recommended.

Desoldering leg remnants from bad capacitors

After removing all capacitors by turning in one direction while pushing down towards the board until the capacitor is removed it’s time to get rid of the broken off legs still soldered on the pads.

Capacitors desoldered, cleaned up the board

After removing the leg remnants with the soldering iron I add some flux and a touch of solder for each pad, and then clean up the board with IPA (Isopropyl Alcohol) to remove flux residue using cotton swabs (cotton buds) to make it clean before soldering the new capacitors in place.

New capacitors on the board

The new capacitors are installed, along with the voltage regulator. I added an extra 470µF 16V capacitor hooked up to ground and output of the voltage regulator to fix the potential vertical line issue, not sure if it really was an issue on this console but cleaning up the power rail voltage is probably good anyway.

SNES PAL (with NTSC using SuperCIC)
Pro Fighter X Turbo copier screenshot
Screenshot from the game R-Type

Time to test, moment of truth, seems to work.

PS4 controller for racing

My son has been playing Forza Horizon 6 on the PC. He plays it with a PS4 controller, so I modified one to include a 10k pot (potentiometer) as steering wheel replacing the left analog stick to improve steering.

PS4 controller disassembled

I’m using a 10k pot which roughly matches the X axis of the analog stick. The wired resistors as seen on the board is an old modification to fix stick drift.

Board with left stick desoldered

The hardest part of this was desoldering the left analog stick, had to add leaded solder first to make it easier.

Pot replacing left stick

The pot is replacing the cavity where the left analog stick used to be. I cut off the plastic top case for the left stick and drilled a hole to fit the pot, then glued it into place with epoxy.

Pot wired up

The pot is soldered in where the X axis of the left analog stick used to be, also added two 4.7k resistors to emulate a centered Y axis stick.

First prototype

This is the result; first prototype. My son has been testing the it for a while now and likes the improved control, but he wants a bigger knob for the pot so I will fix that.

Sega Master System power cycle mod

snaker has posted a complete hardware and firmware tutorial in the forums.

This document describes, in full technical detail, the complete process required to make a Sega Master System 2 work reliably with an EverDrive, a Mega Drive controller and the Light Phaser, without manual power cycling, without unreliable soft resets and without electrical side effects. This is not a simple mod, but a tightly coupled hardware and firmware project built on top of SMS++.

Forum URL: https://modrobert.org/forums/topic/sega-master-system-everdrive-light-phaser-and-true-hard-reset/

Amiga 1200 chip RAM repair

Another adventure with my Amiga 1200, recently when booting I was met with a green solid color boot screen instead of loading AmigaOS 3.1 (workbench) as expected. According to boot error color codes that’s most likely bad chip RAM (the first 2MB of RAM shared with custom chips). I burned Diagrom v1.3 on EPROMs using the MiniPro TL866A programmer and installed those in the motherboard ROM sockets. Diagrom outputs diagnostics via serial port (9600 baud 8n1) on the A1200 which I connected to the COM port on my PC running Linux, the output from Diagrom confirmed that the chip RAM was bad.

The Amiga 1200 motherboard

The chip RAM consists of the four chips located close to the center (upper) part of the motherboard, the two ROM sockets are below. Here’s a close up photo of the area with the RAM chips.

Amiga 1200 chip RAM

Amazingly I managed to find the same RAM chips KM416C256BJ-7 sold on eBay, so bought five of them which arrived a week later. These chips are in a SOJ package, directly soldered onto the motherboard, so I used my SMD rework station to desolder the suspected bad chip using hot air, then cleaned up, and added solder.

One chip removed

I soldered in a new chip, but this was apparently the wrong chip, RAM test still failed, but instead of switching back I just replaced one by one until three chips were replaced and I ended up with address line errors in the Diagrom output. This was turning into a nightmare, and I started to doubt the “new” chips were working.

After going over the schematics again I figured out a way to cross check by measuring zero Ohm (connection) on the data lines and address lines between RAM chips using a multimeter, this made me discover several bad solder joints so had to apply more flux and reheat the chips as needed several times before the solder joints were solid. Admittedly I’m a rookie with the SMD rework station (hot air), much prefer the soldering iron, but things started to improve after upping the temp to 380C.

The Diagrom chip RAM test finally went through OK, so I happily assembled the A1200, put the original ROMs back and AmigaOS (workbench) booted fine, but only 1MB of chip RAM was detected. Frustrated, after looking at the schematics again I noticed that the A1200 3.1 ROM will boot (pass tests) even if only 1MB chip RAM is detected (U16 and U17 required, U18 and U19 optional).

I disassembled the A1200 once more and started measuring the data and address lines on the motherboard, all seemed OK. After some head scratching I decided to measure all pins (not just address and data lines), and found out that on U19, one of the RAM chips, the UCAS line (“Upper Column Address Strobe”, pin 28) was not connecting to the board. After soldering pin 28 on U19 manually using my iron the full 2MB chip RAM was detected, and passing all tests. The repair was finally over.

Banned for using VPN

I recently got banned from Reddit with this warning message showing up:

“This account has been permanently banned. Check your inbox for a message with more information.”

Looks like it really is permanent this time. The first time roughly two weeks ago the stated reason was account security related, after resetting the password it worked fine. Now I got banned again for the same reason, but this time the password reset email doesn’t show up. My Reddit account was created in 2017 and not used much, reading content for the most part as opposed to writing. I’m assuming the reason for the ban in this case is because I’m using a VPN (Virtual Private Network), but not completely sure.

I’ve had similar problems with other services using VPN as well, like bank apps on the phone, video streaming through the browser, and more. In some cases the app/service give error message straight that using VPN is not allowed, while in other cases the reason is not obvious at all. The overall trend seems to be that using tools protecting privacy are considered bad in general and should be punished somehow. In this case the choice was easy, skip Reddit while continuing to use VPN, but there are services which would be a lot harder to skip if this trend continues.